One traditional way to reduce the voltage of a direct current (DC) power supply is to use a linear regulator. Linear regulators work by dissipating heat, however, which is generally considered undesirable and inefficient. On the other hand, buck converters can achieve similar or better results than linear regulators—a buck converter is another type of voltage step-down converter—while maintaining remarkable efficiency.
The operation of a basic buck converter has the electrical current in an inductor controlled by two switches, a “high-side” (HS) switch and a “low-side” (LS) switch. A detection circuit may be employed to detect when a “reverse current” through the inductor crosses the zero axis in order to turn off the LS switch and avoid power drainage. To better illustrate this, consider buck converter 100 of FIG. 1, whose operation is shown in accompanying FIG. 2.
As shown in FIG. 1, an HS switch may be implemented using a P-type metal-oxide-semiconductor (PMOS) transistor whereas an LS switch may use an N-type MOS (NMOS) transistor. The source terminal of the HS switch is coupled to DC input or supply voltage Vin, and the source of the LS switch is coupled to ground. A first terminal of inductor (L) is coupled to node “lx” between the drain terminals of HS and LS. A second terminal of inductor L is coupled to capacitor (C) and load (R) in parallel. The gates of the HS and LS switches are controlled by a logic circuit (not shown) that manages the opening and closing of HS and LS at the appropriate times, in a coordinated manner, to generate a DC output voltage (Vo) that has a value smaller than Vin across load R.
Referring to FIG. 2, graph 200A shows the current through inductor L (iL) and graph 200B shows voltage (VLX) at node lx when buck converter 100 is in operation. Between times t0 and t1, HS is closed (“on”) and LS is open (“off”), therefore current iL increases and VLX assumes the value of Vin minus a small voltage drop across HS. At time t1, HS is opened (“off”), LS is closed (“on”), and current iL therefore starts to decrease. A logic circuit identifies the zero-crossing at time t2 and opens LS at time t3 to avoid power drainage. The process is then repeated periodically thereafter.
As the inventor hereof has recognized, however, ordinary buck converters undesirable for several low-power and high-efficiency applications. To address these, and other problems, the inventor hereof has designed zero-current crossing detection circuits that are precise, fast, and independent of process, voltage, and temperature (PVT) variations.